AMD says it will pursue plans for High Bandwidth Memory. The news was confirmed earlier this month and is already being affectionately called HBM. While rumors had been swirling about the AMD technical movement, it was only now officially confirmed by the company.
HBM will apply to the AMD’s next lineup of high-end Radeon cards it releases. The new plan comes after seven years of research by AMD, which involved exploring how HBM has benefits over GDDR5.
For memory standards, HBM represents a newer standard than GDDR5. While GDDR5 is extremely scalable, as shown by its application over the last ten years, a problem has become how to route several traces around the GPU. Overall, GDDR5 has been found to limit form factors.
For example, its chips are not getting smaller, and many devices are necessary to reach the high bandwidth. As well, big voltage regulators are needed for GDDR5, due to its high power loads. While a suggested solution has been to increase clock speeds to meet demands of faster GPUS, this no longer seems to suffice.
These many of these reasons, AMD will adopt high bandwidth memory. With this scenario, the GPU, and its memory will connect via a 2.5D interposer, rather than linking to a DRAM off the package. Benefits include ultra-wide bus width and lower power consumption than previously.
AMD’s plan is significant as this is the first iteration of HBM for the market. It features stacked chips of four DRAM die, which are one on top of the over vertically. The new memory bandwidth will solve bandwidth issues that have halted integrated graphics from coming to fruition for so long. It will be interesting to follow the AMD plan and not the significance it has for APUs over the next year and a half to two years. The organization has not yet given a specific timeline.
